Fermat
binned_sah_builder.h
1 /*
2  * Copyright (c) 2010-2011, NVIDIA Corporation
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are met:
7  * * Redistributions of source code must retain the above copyright
8  * notice, this list of conditions and the following disclaimer.
9  * * Redistributions in binary form must reproduce the above copyright
10  * notice, this list of conditions and the following disclaimer in the
11  * documentation and/or other materials provided with the distribution.
12  * * Neither the name of NVIDIA Corporation nor the
13  * names of its contributors may be used to endorse or promote products
14  * derived from this software without specific prior written permission.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19  * DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
20  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 #pragma once
29 
30 #include <nih/bvh/bvh.h>
31 #include <nih/linalg/vector.h>
32 #include <nih/linalg/bbox.h>
33 #include <nih/bintree/bintree_node.h>
34 #include <nih/bintree/cuda/bintree_gen_context.h>
35 #include <thrust/device_vector.h>
36 
37 namespace nih {
38 namespace cuda {
39 
40 namespace binned_sah {
41 
42  struct Bin
43  {
44  float4 bmin;
45  float4 bmax;
46 
47  FORCE_INLINE NIH_HOST_DEVICE int32 get_size() const { return binary_cast<int32>( bmin.w ); }
48  FORCE_INLINE NIH_HOST_DEVICE void set_size(const int32 x) { bmin.w = binary_cast<float>(x); }
49  };
50  struct Split
51  {
52  NIH_HOST_DEVICE Split() {}
53  NIH_HOST_DEVICE Split(int32 id, int32 plane) : task_id(id), best_plane(plane) {}
54 
55  int32 task_id;
56  int32 best_plane;
57  };
58  struct Queue
59  {
60  Bin* bins;
61  Split* splits;
62  uint32* offsets;
63  int32 size;
64  };
65  struct Objects
66  {
67  int4* bin_ids;
68  int32* node_ids;
69  int32* split_ids;
70  uint32* index;
71  };
72  struct Bbox
73  {
74  float3 bmin;
75  float3 bmax;
76  };
77  struct Bins
78  {
79  float3* bmin;
80  float3* bmax;
81  volatile int32* size;
82  };
83 
84 } // namespace binned_sah
85 
90 struct Binned_sah_builder
98 {
105  thrust::device_vector<Bvh_node>& nodes,
106  thrust::device_vector<uint2>& leaves,
107  thrust::device_vector<uint32>& index) :
108  m_nodes( &nodes ), m_leaves( &leaves ), m_index( &index )
109  {
110  m_init_bins_time = 0.0f;
111  m_update_bins_time = 0.0f;
112  m_sah_split_time = 0.0f;
113  m_distribute_objects_time = 0.0f;
114  }
115 
124  template <typename Iterator>
125  void build(
126  const uint32 BINS,
127  const Bbox3f bbox,
128  const Iterator bbox_begin,
129  const Iterator bbox_end,
130  const Iterator h_bbox_begin,
131  const uint32 max_leaf_size,
132  const float max_cost = 1.8f);
133 
134  thrust::device_vector<Bvh_node>* m_nodes;
135  thrust::device_vector<uint2>* m_leaves;
136  thrust::device_vector<uint32>* m_index;
137  uint32 m_levels[128];
138  uint32 m_level_count;
139  Bbox3f m_bbox;
140  uint32 m_node_count;
141  uint32 m_leaf_count;
142 
143  float m_init_bins_time;
144  float m_update_bins_time;
145  float m_sah_split_time;
146  float m_distribute_objects_time;
147 
148  typedef binned_sah::Bin Bin;
149  typedef binned_sah::Bbox Bbox;
150  typedef binned_sah::Split Split;
151  typedef binned_sah::Queue Queue;
153  typedef binned_sah::Bins Bins;
154 
155  thrust::device_vector<float3> m_bin_bmin;
156  thrust::device_vector<float3> m_bin_bmax;
157  thrust::device_vector<int32> m_bin_size;
158  thrust::device_vector<Bin> m_queue_bins;
159  thrust::device_vector<Split> m_queue_splits;
160  thrust::device_vector<uint32> m_queue_offsets;
161 
162  thrust::device_vector<int4> m_bin_ids;
163  thrust::device_vector<int32> m_split_ids;
164  thrust::device_vector<int32> m_node_ids;
165  thrust::device_vector<uint32> m_new_pos;
166  thrust::device_vector<uint32> m_counters;
167 };
168 
172 } // namespace cuda
173 } // namespace nih
174 
175 #include <nih/bvh/cuda/binned_sah_builder_inline.h>
Definition: binned_sah_builder.h:65
Definition: binned_sah_builder.h:72
Definition: binned_sah_builder.h:50
Definition: sah_builder.h:37
Definition: binned_sah_builder.h:97
Definition: binned_sah_builder.h:42
Binned_sah_builder(thrust::device_vector< Bvh_node > &nodes, thrust::device_vector< uint2 > &leaves, thrust::device_vector< uint32 > &index)
Definition: binned_sah_builder.h:104
Definition: binned_sah_builder.h:58
CUGAR_FORCEINLINE CUGAR_HOST_DEVICE Out binary_cast(const In in)
Definition: types.h:288
Definition: binned_sah_builder.h:77