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AxiManagerGateIf.h
1/*
2 * Copyright (c) 2017-2024, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License")
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#ifndef __AXIMANAGERGATEIF_H__
18#define __AXIMANAGERGATEIF_H__
19
20#include <nvhls_message.h>
21#include <axi/axi4.h>
22
28template <typename Cfg>
29struct Request : public nvhls_message {
30 public:
31 Request() {};
32 Request(const Request &rhs) {
33 addr = rhs.addr;
34 burst = rhs.burst;
35 len = rhs.len;
36 size = rhs.size;
37 cache = rhs.cache;
38 auser = rhs.auser;
39 };
40
41 typedef axi::axi4<Cfg> axi4_;
42
43 typename axi4_::Addr addr;
44 typename axi4_::BeatNum len;
45 typename axi4_::BeatSize size;
46 typename axi4_::Burst burst;
47 typename axi4_::Cache cache;
48 typename axi4_::AUser auser;
49
50 static const unsigned int width = axi4_::ADDR_WIDTH + axi4_::ALEN_WIDTH +
51 axi4_::ASIZE_WIDTH + axi4_::BURST_WIDTH +
52 axi4_::CACHE_WIDTH + axi4_::AUSER_WIDTH;
53
54 template <unsigned int Size>
55 void Marshall(Marshaller<Size>& m) {
56 m& addr;
57 m& len;
58 m& size;
59 m& burst;
60 m& cache;
61 m& auser;
62 }
63
64 void copyToAddrPayload(typename axi4_::AddrPayload& payload) const {
65 payload.addr = addr;
66 payload.burst = burst;
67 payload.len = len;
68 payload.size = size;
69 payload.cache = cache;
70 payload.auser = auser;
71 };
72};
73
79template <typename Cfg>
80struct RdRequest : public Request<Cfg> {};
81
87template <typename Cfg>
88struct WrRequest : public Request<Cfg> {
89 public:
90 WrRequest() {};
91 WrRequest(const WrRequest &rhs) : Request<Cfg>(rhs) {
92 data = rhs.data;
93 last = rhs.last;
94 wuser = rhs.wuser;
95 };
96 typename Request<Cfg>::axi4_::Data data;
97 typename Request<Cfg>::axi4_::Last last;
98 typename Request<Cfg>::axi4_::WUser wuser;
99
100 static const unsigned int width =
103
104 template <unsigned int Size>
105 void Marshall(Marshaller<Size>& m) {
112 m& data;
113 m& last;
114 m& wuser;
115 }
116};
117
123template <typename Cfg>
124struct WrResp : public nvhls_message
125{
126 typedef axi::axi4<Cfg> axi4_;
127 typename axi4_::Resp resp;
128 typename axi4_::BUser buser;
129
130 static const unsigned int width = axi4_::RESP_WIDTH + axi4_::BUSER_WIDTH;
131
132 template <unsigned int Size>
133 void Marshall(Marshaller<Size>& m) {
134 m& resp;
135 m& buser;
136 }
137};
138
144template <typename Cfg>
145struct RdResp : public nvhls_message
146{
147 typedef axi::axi4<Cfg> axi4_;
148 typename axi4_::Resp resp;
149 typename axi4_::Data data;
150 typename axi4_::Last last;
151 typename axi4_::RUser ruser;
152
153 static const unsigned int width = axi4_::RESP_WIDTH + axi4_::DATA_WIDTH +
154 axi4_::LAST_WIDTH + axi4_::RUSER_WIDTH;
155
156 template <unsigned int Size>
157 void Marshall(Marshaller<Size>& m) {
158 m& resp;
159 m& data;
160 m& last;
161 m& ruser;
162 }
163};
164
165#endif
The base axi4 class parameterized according a valid config.
Definition axi4.h:64
The struct for read requests for AxiManagerGate.
The struct for read responses for AxiManagerGate.
The base type for read or write requests for AxiManagerGate, containing common fields.
The struct for write requests for AxiManagerGate.
The struct for write responses for AxiManagerGate.
A struct composed of the signals associated with AXI read and write requests.
Definition axi4.h:114