MatchLib
RVSink.h
1 /*
2  * Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License")
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  * http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #ifndef __RV_SINK_H__
18 #define __RV_SINK_H__
19 
20 #include <systemc.h>
21 #include <ac_int.h>
22 #include <axi/axi4.h>
23 #include <mem_array.h>
24 #include <fifo.h>
25 #include <axi/AxiSlaveToReadyValid.h>
26 #include <queue>
27 #include <map>
28 
41 template <typename rvCfg>
42 SC_MODULE(RVSink) {
43  public:
44  sc_in<bool> clk;
45  sc_in<bool> reset_bar;
46 
47  typedef NVUINTW(rvCfg::dataWidth) Data;
48  typedef NVUINTW(rvCfg::addrWidth) Addr;
49  typedef NVUINTW(rvCfg::wstrbWidth) Wstrb;
50  typedef NVUINTW(1) RW;
51 
55  class Write : public nvhls_message {
56  public:
57  Data data;
58  Addr addr;
59  Wstrb wstrb;
60  RW rw; // 0=read, 1=write
61 
62  static const unsigned int width =
63  rvCfg::dataWidth + rvCfg::addrWidth + rvCfg::wstrbWidth + 1;
64 
65  template <unsigned int Size>
66  void Marshall(Marshaller<Size>& m) {
67  m& data;
68  m& addr;
69  m& wstrb;
70  m& rw;
71  }
72  };
73 
77  class Read : public nvhls_message {
78  public:
79  Data data;
80 
81  static const unsigned int width = rvCfg::dataWidth;
82 
83  template <unsigned int Size>
84  void Marshall(Marshaller<Size>& m) {
85  m& data;
86  }
87  };
88 
89  static const int kDebugLevel = 4;
90 
91  Connections::Out<Read> rv_read;
92  Connections::In<Write> rv_write;
93 
94  std::map<Addr, NVUINTW(8)> localMem;
95 
96  SC_HAS_PROCESS(RVSink);
97 
98  RVSink(sc_module_name name_)
99  : sc_module(name_),
100  clk("clk"),
101  reset_bar("reset_bar"),
102  rv_read("rv_read"),
103  rv_write("rv_write") {
104  SC_THREAD(run);
105  sensitive << clk.pos();
106  async_reset_signal_is(reset_bar, false);
107  }
108 
109  void run() {
110  rv_read.Reset();
111  rv_write.Reset();
112 
113  Write rv_req_reg;
114  Read rv_resp_reg;
115 
116  while (1) {
117  wait();
118  if (rv_write.PopNB(rv_req_reg)) {
119  CDCOUT(sc_time_stamp() << " " << name() << " RV request received:"
120  << " data=" << hex << rv_req_reg.data
121  << " addr=" << hex << rv_req_reg.addr.to_uint64()
122  << " wstrb=" << hex
123  << rv_req_reg.wstrb.to_uint64()
124  << " isWrite=" << rv_req_reg.rw << endl,
125  kDebugLevel);
126  if (rv_req_reg.rw) {
127  for (int i = 0; i < rvCfg::wstrbWidth; i++) {
128  if (rv_req_reg.wstrb[i] == 1) {
129  localMem[rv_req_reg.addr + i] =
130  nvhls::get_slc<8>(rv_req_reg.data, 8 * i);
131  }
132  }
133  } else {
134  for (int i = 0; i < rvCfg::wstrbWidth; i++) {
135  rv_resp_reg.data = nvhls::set_slc(
136  rv_resp_reg.data, localMem[rv_req_reg.addr + i], 8 * i);
137  }
138  rv_read.Push(rv_resp_reg);
139  CDCOUT(sc_time_stamp() << " " << name() << " Sending RV read response"
140  << " data=" << hex
141  << rv_resp_reg.data << endl,
142  kDebugLevel);
143  }
144  }
145  }
146  }
147 };
148 
149 #endif
type1 set_slc(type1 X, type2 Y, const unsigned int i)
Function that replaces slice of bits.
Definition: nvhls_int.h:387
SC_MODULE(RVSink)
A testbench component to verify AxiSlaveToReadyValid.
Definition: RVSink.h:42
NVUINTW(Wrapped< T >::width) TypeToNVUINT(T in)
Convert Type to NVUINT.
Definition: TypeToBits.h:115
#define CDCOUT(x, y)
Definition: hls_globals.h:73