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An n-way splitter that connects a single AXI manager port to a multiple AXI subordinate ports. More...
#include <AxiSplitter.h>
Public Types | |
typedef axi::axi4< axiCfg > | axi4_ |
typedef axi4_::read::template manager ::ARPort | axi_rd_manager_ar |
typedef axi4_::read::template manager ::RPort | axi_rd_manager_r |
typedef axi4_::write::template manager ::AWPort | axi_wr_manager_aw |
typedef axi4_::write::template manager ::WPort | axi_wr_manager_w |
typedef axi4_::write::template manager ::BPort | axi_wr_manager_b |
Public Member Functions | |
SC_HAS_PROCESS (AxiSplitter) | |
AxiSplitter (sc_module_name name) | |
void | run_r () |
void | run_w () |
Public Attributes | |
sc_in< bool > | clk |
sc_in< bool > | reset_bar |
nvhls::nv_array< axi_rd_manager_ar, numSubordinates > | axi_rd_s_ar |
nvhls::nv_array< axi_rd_manager_r, numSubordinates > | axi_rd_s_r |
nvhls::nv_array< axi_wr_manager_aw, numSubordinates > | axi_wr_s_aw |
nvhls::nv_array< axi_wr_manager_w, numSubordinates > | axi_wr_s_w |
nvhls::nv_array< axi_wr_manager_b, numSubordinates > | axi_wr_s_b |
axi4_::read::template subordinate | axi_rd_m |
axi4_::write::template subordinate | axi_wr_m |
sc_in< NVUINTW(numAddrBitsToInspect)> | addrBound [numSubordinates][2] |
Static Public Attributes | |
static const int | kDebugLevel = 5 |
static const unsigned int | log_numSubordinates = nvhls::log2_ceil<numSubordinates>::val + 1 |
An n-way splitter that connects a single AXI manager port to a multiple AXI subordinate ports.
axiCfg | A valid AXI config. |
numSubordinates | The number of subordinates to send traffic to. |
numAddrBitsToInspect | The number of address bits to inspect when determining which subordinate to direct traffic to. If this is less than the full address width, the routing determination will be made based on the number of address LSBs specified. (Default: axiCfg::addrWidth) |
default_output | If true, requests with addresses that do not fall in any of the specified address ranges will be directed to the highest-indexed subordinate port. (Default: false) |
translate_addr | If true, requests are re-addressed relative to the base address of the receiving subordinate when they are passed through the splitter. (Default: false) |
This module sets the stall mode to flush by default to mitigate possible RTL bugs that can occur in the default stall mode. If you are confident that this class of bugs will not occur in your use case, you can change the stall mode via TCL directive:
This may reduce area/power.
Definition at line 62 of file AxiSplitter.h.